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CMOS STATIC RAM 256K (32K x 8-BIT)
Integrated Device Technology, Inc.
IDT71256SA70
FEATURES:
* 32K x 8 CMOS static RAM * Equal access and cycle times -- Commercial: 70ns * One Chip Select plus one Output Enable pin * Bidirectional data inputs and outputs directly TTL-compatible * Low power consumption via chip deselect * Available in 28-pin 30 mil Plastic SOJ, 28-pin 300 mil Plastic Dip, 28-pin 300 mil TSOP Type I, and 28-pin 600 mil Plastic Dip.
DESCRIPTION:
The IDT71256SA is a 262,144-bit medium-speed Static RAM organized as 32K x 8. It is fabricated using IDT's highperfomance, high-reliability CMOS technology. This state-ofthe-art technology, combined with innovative circuit design techniques, provides a cost-effective solution for your memory needs. All bidirectional inputs and outputs of the IDT71256SA are TTL-compatible and operation is from a single 5V supply. Fully static asynchronous circuitry is used, requiring no clocks or refresh for operation. The IDT71256SA is packaged in a 28-pin 300 mil Plastic SOJ, 28-pin 300 mil Plastic Dip, 28-pin 300 mil TSOP Type I and 28-pin 600 mil Plastic Dip.
FUNCTIONAL BLOCK DIAGRAM
A0 ADDRESS DECODER A14 262,144 BIT MEMORY ARRAY
V CC GND
I/O 0 INPUT DATA CIRCUIT I/O 7 I/O CONTROL
CS OE WE
CONTROL CIRCUIT
3567 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGE
(c)1996 Integrated Device Technology, Inc.
JULY 1996
3567/1
1
IDT71256SA70 CMOS STATIC RAM 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14
ABSOLUTE MAXIMUM RATINGS(1)
Symbol
28 27 26 25 24
Rating Terminal Voltage with Respect to GND Operating Temperature Temperature Under Bias Storage Temperature Power Dissipation DC Output Current
Com'l. -0.5 to +7.0
Unit V
VCC
WE
VTERM
(2)
SO28-5 P28-1 P28-2
23 22 21 20 19 18 17 16 15
A13 A8 A9 A11
OE
TA TBIAS TSTG PT IOUT
0 to +70 -55 to +125 -55 to +125 1.0 50
C C C W mA
A10
CS
I/O7 I/O6 I/O5 I/O4 I/O3
3567 drw 02
SOJ/DIP TOP VIEW
OE
22 23 24 25 26 27 28 1 2 3 4 5 6 7
21 20 19 18 17 16 15 14 13 12 11 10 9 8
A 10
CS
NOTES: 3567 tbl 02 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
A 11 A9 A8 A 13
WE
V CC A 14 A 12 A7 A6 A5 A4 A3
SO28-8
I/O7 I/O6 I/O5 I/O4 I/O3 GND I/O2 I/O1 I/O0 A0 A1 A2
3567 drw 03
CAPACITANCE
(TA = +25C, f = 1.0MHz, SOJ package)
Symbol CIN CI/O Parameter(1) Input Capacitance I/O Capacitance Conditions VIN = 3dV VOUT = 3dV Max. 11 11 Unit pF pF
NOTE: 3567 tbl 03 1. This parameter is guaranteed by device characterization, but not production tested.
TSOP TOP VIEW
TRUTH TABLE(1,2)
CS OE WE
I/O DATAOUT DATAIN High-Z High-Z High-Z
Function Read Data Write Data Outputs Disabled Deselected -- Standby (ISB) Deselected -- Standby (ISB1)
3567 tbl 04
RECOMMENDED DC OPERATING CONDITIONS
Symbol VCC GND VIH VIL Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage Min. 4.5 0 2.2 -0.5
(1)
L L Max. 5.5 0 VCC+0.5 0.8 Unit V V V V L H VHC(3)
L X H X X
H L H X X
Typ. 5.0 0 -- --
NOTE: 3567 tbl 01 1. VIL (min.) = -1.5V for pulse width less than 10ns, once per cycle.
NOTES: 1. H = VIH, L = VIL, x = Don't care. 2. VLC = 0.2V, VHC = VCC -0.2V. 3. Other inputs VHC or VLC.
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V 10%
IDT71256SA Symbol |ILI| |ILO| VOL VOH Parameter Input Leakage Current Output Leakage Current Output Low Voltage Output High Voltage Test Condition VCC = Max., VIN = GND to VCC VCC = Max., CS = VIH, VOUT = GND to VCC IOL = 8mA, VCC = Min. IOH = -4mA, VCC = Min. Min. -- -- -- 2.4 Max. 5 5 0.4 -- Unit A A V V
3567 tbl 05
2
IDT71256SA70 CMOS STATIC RAM 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V 10%, VLC = 0.2V, VHC = VCC-0.2V)
71256SA70 Symbol ICC ISB ISB1 Parameter Dynamic Operating Current (2) CS VIL, Outputs Open, VCC = Max., f = fMAX Standby Power Supply Current (TTL Level) (2) CS VIH, Outputs Open, VCC = Max., f = fMAX Standby Power Supply Current (CMOS Level) (2) CS VHC, Outputs Open, VCC = Max., f = 0 VIN VLC or VIN VHC Com'l. 130 20 15 Unit mA mA mA
NOTES: 1. All values are maximum guaranteed values. 2. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing .
3567 tbl 06
AC TEST CONDITIONS
Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load GND to 3.0V 3ns 1.5V 1.5V See Figures 1 and 2
3567 tbl 07
5V 480 DATAOUT 30pF* 255
3567 drw 04
5V 480 DATAOUT 5pF* 255
3567 drw 05
*Including jig and scope capacitance.
Figure 1. AC Test Load
Figure 2. AC Test Load (for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
3
IDT71256SA70 CMOS STATIC RAM 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V 10%, CommercialTemperature Range Only)
71256SA70 Symbol Read Cycle tRC tAA tACS tCLZ(2) tCHZ(2) tOE tOLZ tOH tPU tPD
(2) (2) (2) (2)
Parameter Read Cycle Time Address Access Time Chip Select Access Time Chip Select to Output in Low-Z Chip Deselect to Output in High-Z Output Enable to Output Valid Output Enable to Output in Low-Z Output Disable to Output in High-Z Output Hold from Address Change Chip Select to Power Up Time Chip Deselect to Power Down Time Write Cycle Time Address Valid to End of Write Chip Select to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data Valid to End of Write Data Hold Time
Min. 70 -- -- 4 0 -- 0 0 3 0 -- 70 20 20 0 20 0 13 0 4 0
Max. -- 70 70 -- 11 11 -- 10 -- -- 25 -- -- -- -- -- -- -- -- -- 11
Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
3567 tbl 08
tOHZ
Write Cycle tWC tAW tCW tAS tWP tWR tDW tDH tOW
(2) (2)
Output Active from End of Write Write Enable to Output in High-Z
tWHZ
NOTES: 1. 0 to +70C temperature range only. 2. This parameter is guaranteed with the AC Load (Figure 2) by device characterization, but is not production tested.
TIMING WAVEFORM OF READ CYCLE NO. 1(1)
tRC ADDRESS tAA
OE
tOE
CS
tOLZ
(5)
tACS tCLZ DATAOUT ICC ISB
(5)
(3)
tOHZ tCHZ
(5)
(5)
HIGH IMPEDANCE tPU
DATA OUT VALID tPD
VCC SUPPLY CURRENT
3567 drw 06
4
IDT71256SA70 CMOS STATIC RAM 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF READ CYCLE NO. 2(1,2,4)
tRC ADDRESS tAA tOH DATAOUT PREVIOUS DATAOUT VALID tOH DATAOUT VALID
3567 drw 07
NOTES: 1. WE is HIGH for Read Cycle. 2. Device is continuously selected, CS is LOW. 3. Address must be valid prior to or coincident with the later of CS transition LOW; otherwise tAA is the limiting parameter. 4. OE is LOW. 5. Transition is measured 200mV from steady state.
TIMING WAVEFORM OF WRITE CYCLE NO.1 (WE CONTROLLED TIMING)(1,2,3,5) WE
tWC ADDRESS tAW
CS
tAS
WE
tWP(3)
tWR
tWHZ DATAOUT
(4)
(6)
tOW HIGH IMPEDANCE tDW tDH
(6)
tCHZ
(4)
(6)
DATAIN
DATAIN VALID
3567 drw 08
TIMING WAVEFORM OF WRITE CYCLE NO.2 (CS CONTROLLED TIMING)(1,2,5) CS
tWC ADDRESS tAW
CS
tAS
WE
tCW
tWR
tDW DATAIN DATAIN VALID
tDH
NOTES: 3567 drw 09 1. WE or CS must be HIGH during all address transitions. 2. A write occurs during the overlap of a LOW CS and a LOW WE. 3. OE is continuously HIGH. If during a WE controlled write cycle OE is LOW, tWP must be greater than or equal to tWHZ + tDW to allow the I/O drivers to turn off and data to be placed on the bus for the required tDW. If OE is HIGH during a WE controlled write cycle, this requirement does not apply and the minimum write pulse is as short as the specified tWP. 4. During this period, I/O pins are in the output state, and input signals must not be applied. 5. If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in a high-impedance state. 6. Transition is measured 200mV from steady state.
5
IDT71256SA70 CMOS STATIC RAM 256K (32K x 8-BIT)
COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT 71256 Device Type SA Power XX Speed XXX Package X Process/ Temperature Range Blank
Commercial (0C to +70C)
P TP Y PZ
600-mil Plastic Dip (P28-1) 300-mil Plastic DIP (P28-2) 300-mil SOJ (SO28-5) TSOP Type I (SO28-8)
70
Speed in nanoseconds
3567 drw 10
6

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